Chemical beam epitaxy (CBE) is a very versatile semiconductor epitaxial growth technique that utilizes beams of compound ("precursor") chemicals directly impinging onto a heated semiconductor substrate surface. See, for instance, W.T. Tsang, Journal of Crystal Growth, Vol. 105, p. 1 (1990); and W.T. Tsang, Journal of Crystal Growth, Vol. 120, p. 1 (1992), both incorporated herein by reference. Under properly controlled conditions, decomposition of the arriving precursor chemicals results in the incorporation of the desired elements to produce an epitaxial film on a single crystal substrate.
Etching of some III/V semiconductors by exposure to an appropriate gaseous medium is also known. For instance, GaAs etching by chlorine (3.times.10.sup.-4 Torr Cl.sub.2, 200.degree. C.) gas in a vacuum chamber has been reported. See. R.A. Hamm et al., Applied Physics Letters, (Vol. 61, p. 592 (1992). The etching of InP and GaAs by HCl in a MOVPE reactor (e.g., 76 Torr HCl, 625.degree. C.) has also been reported. See for instance, C. Caneau et al., Journal of Crystal Growth, Vol. 107, p. 203 (1991).
Y. Kadoya et al., Applied Physics Letters, Vol. 61 (14), p. 1658, disclose etching GaAs by exposure to Cl.sub.2 (3 minutes, 150.degree. C.) in an etch chamber, transferring the sample to a MBE growth chamber through a UHV transfer tunnel, followed by growth of epitaxial AlGaAs by MBE (at 580.degree. C.) on the etched surface.
U.S. Pat. No. 4,897,361 discloses patterning of a semiconductor mask layer by a technique that comprises exposure to an ion beam and dry etching, followed by in-situ growth of epitaxial semiconductor material, all without exposure of the sample of the ambient atmosphere. See also U.S. Pat. No. 5,106,764.
Certain disadvantages are associated with prior art etching techniques, including the multi-chamber etch/growth techniques. For instance, it is typically not possible to switch rapidly (e.g., within about 1 s) from etching to growth or vice versa. This is a disadvantage in the manufacture of devices that require multiple etching/growth sequences. Furthermore, prior art low pressure techniques typically are limited to substrate temperatures below the preferential evaporation temperature of the group V element or elements (e.g., .ltorsim.300.degree. C. for InP), in order to prevent surface morphology degradation. Prior art techniques are also limited with regard to possible modification of surface chemistry.
This application discloses a method of making compound semiconductor devices that substantially overcomes one or more of the recited disadvantages associated with prior art etching techniques.